Today power dissipation in switching devices is considered as the most important roadblock for future nanoelectronic circuits and systems. Among the power components the subthreshold power becomes dominant in aggressively scaled MOS transistors and limits their voltage scaling. The subthreshold swing, SS, of the gate switch-on characteristics of a field effect transistor (FET) limits the switching range, and thus the minimum supply voltage in advanced CMOS devices and their ultimate power dissipation. In conventional FETs, SS is limited to 60 mV/decade at room temperature.
In order to obtain a value of SS lower than 60 mV/decade at room temperature different principles have been proposed to date:
(1) impact ionization MOS devices (IMOS) see reference [1],
(2) tunnel FET devices (TFET) see references [2, 3, 4],
(3) micro-electro-mechanical (MEM) devices see references [5 6] and
(4) negative capacitance FET (NEG-FET) see references [7, 8].
Any of these devices is exploiting a single and unique principle for obtaining the steep transition between the off and on state:
(1) impact ionization in IMOS,
(2) band-to-band tunneling in TFET,
(3) pull-in event in MEM switches and
(4) the exploitation of negative capacitance in ferroelectrics integrated in the gate stack of Field Effect Transistor.